Archive-name: sun-hdwr-ref/part1 Posting-Frequency: as revised Version: $Id: part1,v 1.10 1995/11/24 02:10:25 jwbirdsa Exp $ THE SUN HARDWARE REFERENCE compiled by James W. Birdsall (jwbirdsa@picarefy.com) PART I ====== OVERVIEW CPU/CHASSIS OVERVIEW ======== This primary focus of this document is to cover older Sun-badged hardware in detail sufficient to be useful to buyers and collectors of used Sun hardware, much of which comes without documentation. Details on hardware commonly used with Suns, especially hardware specifically designed for Suns, are also included where available. The focus is generally on older equipment, since information on newer equipment is more readily available, from Sun itself if nowhere else. In particular, no effort is made to keep up with Sun's introduction of new SPARC models or Mbus modules. Note that there is no warranty of any kind on the information in this document. It has been assembled from a variety of sources of varying reliability. Efforts have been made to exclude information known to be incorrect, and to include only information deemed reasonably reliable, but there is no guarantee on any of it, especially since official Sun documents occasionally contradict each other. This document is copyright (c) 1995 by James W. Birdsall. You may distribute it freely in unmodified form. THIS DOCUMENT IS A WORK IN PROGRESS. I still have a lot of information which I have not had time to integrate yet. In addition, if you have documentation for systems or boards not listed here, speak up! I would really like to get ahold of an *old* Sun Field Engineer's Handbook. Henry Bryant of Sun's Atlanta office kindly donated one that covers Sun-3's, 386i's, and Sun-4's, but I'm still looking for an old one that covers Sun-2's. Even the opportunity to borrow one would be appreciated. This document is available via anonymous FTP from ftp.picarefy.com in /pub/Sun-Hardware-Ref as a .tar.Z, .zip, or individual parts in the parts directory. It is also available from ftp.netcom.com in /pub/ru/rubicon/sun.hdwr.ref. This document is organized into the following sections: *** PART I *** OVERVIEW CPU/CHASSIS Sun-1, Sun-2, Sun-3, Sun 386i, Sun-4/SPARC General descriptions of the models, including processor/fpu/speed, bus, chassis type, OS support, etc. Processor Data Info on SuperSPARC, microSPARC, etc. SPARC Register Overview. *** PART II *** FAQ ROM Monitors How to use the ROM monitor built into every Sun (boot instructions and other tips). Using a Terminal as Console Notes on using a serial terminal instead of a Sun framebuffer and keyboard. Memory Display on Startup How much memory a system has. Miscellaneous Questions and Answers Facts in Search of a Home Miscellaneous Pinouts SIMM Compatbility Chart *** PART III *** BOARDS crossreference by bus, CPU/motherboard, SPARC modules Descriptions of boards by type and part number, including pinouts, jumpers, DIP switch settings, and LEDs. *** PART IV *** BOARDS (cont'd) memory, video, SCSI, non-SCSI disk controllers, tape controllers, Ethernet, serial/parallel/other commo, floating-point/system accelerator, backplanes, other Descriptions of boards by type and part number, including pinouts, jumpers, DIP switch settings, and LEDs. *** PART V *** DISKS SMD, MFM, ESDI, SCSI Descriptions of models commonly used, including jumpers and switch settings. KEYBOARDS Types 1-5c Descriptions of types of keyboards, what CPUs they work with, and any configuration information. Alternatives Ergonomic keyboards. MICE Sun-1, Sun-2, Sun-3, Sun-4 Descriptions of types of mice, what CPUs they work with, and any configuration information. Alternatives Trackballs, etc. MONITORS TTL mono, ECL/TTL mono, color Descriptions of types of monitors, what video boards they work with, and any configuration information. FLOPPY DRIVES Descriptions of models commonly used, including jumpers and switch settings. TAPE DRIVES 9-track, QIC-11, QIC-24 Descriptions of models commonly used, including jumpers and switch settings. *** PART VI *** APPENDICES Cardcage configuration tables What cards go in which slots in which machines. *** PART VII *** APPENDICES (cont'd) Repairs and Modifications Repair and modification information as contributed by various net.people. Part number index Index of all known part numbers, with references to larger descriptions, if any, in the main body Announcement Dates/List Prices Announcement dates and list prices for various configurations. Author's Notes Miscellanea. Bibliography/Acknowledgments Contributors, and documents used in compiling this reference. CPU/CHASSIS =========== For each model listed below, whatever information is available is given, in the following order: Processor: The microprocessor followed by its clock speed in MHz. The floating point coprocessor (FPU), if any, followed by whatever information is available about the MMU, including the number of hardware contexts. Lastly, various speed ratings, as available: MIPS (Millions of Instructions Per Second, aka Meaningless...), MFLOPS (Millions of FLoating-point OPerations per Second), SPECmark89, and/or SPECint92/SPECfp92/SPECintRate92/SPECfpRate92. Note that some SPARC processors are referred to by name; information on these is available in the "Processor Data" section. CPU or motherboard: The Sun part number of the CPU board or motherboard. Chassis type: "Rackmount" chassis, as the name suggests, are designed to fit into a standard 19" equipment rack. They usually require clearance over and under the chassis for cooling. "Pizza box" chassis are intended to sit on a desktop, typically underneath the monitor; they are low, wide, and deep. Older pizza boxes (2/50, 3/75, 3/50, and 3/60) are much wider than they are deep; newer ones are square (3/80, SPARCstation 1, 1+, 2, etc.). Some older pizza boxes (mostly the 3/50) have a 'dimple top', a case top with a circular depression that allows the chassis to serve as a tilt/swivel monitor base directly. 9-slot Multibus and 12-slot VME (and probably 6-slot VME as well) "deskside" chassis are wide towers that must stand on the floor. 3-slot VME "deskside" chassis can stand on the floor as narrow towers or lie on their sides on a desktop as tallish pizza boxes. "Lunchbox" chassis are small rectangular boxes the size of a couple large hardcover books stacked. "Monitor" chassis (SPARCstation SLC, etc.) have the motherboard in the back of the monitor. Bus: Whatever bus or busses the machine has. Sun has, at various times, used Multibus, VMEbus, ISA, SBus, Mbus, and XDBus. Memory: The amount of physical memory the machine can take, if known, followed by the maximum size of the machine's virtual memory space, if known, followed by the cycle time for physical memory, if known, and finally details of any on-chip or off-chip caches, if known. The caches on the Motorola 68020 and 68030 and the Intel 80386 are not described, since information on these chips is widely known. To save space, the on-chip caches of various common SPARC processors are described in the "Processor Data" section. Notes: General information which does not belong under other headings. Not all models shown in the Announcement Date/List Price section in the appendix are described in this section. In particular, models which differ only in peripherals have been excluded. Sun-1 ----- OVERVIEW Sun-1's were the very first models ever produced by Sun. The earliest ran Unisoft V7 UNIX; SunOS 1.x was introduced later. According to some sources, fewer than 200 Sun-1's were ever produced; they are certainly rare. The switch from Motorola 68000's to 68010's occurred during the Sun-1's reign. Some models are reported to have 3Mbit Ethernet taps as well as 10Mbit. 68000-based Sun-1's are not supported by SunOS. The last version of SunOS to support Sun-1's may be the same as the last version to support Sun-2's, since the 100U CPU boards are the same part. From bjork@rahul.net (../Steven): [The Sun-1] did not have the DVMA of the sun-2 architecture. There was an even earlier board that had the 68000, not the 68010. The 68000 board was licensed by Stanford to several folks (can't recall names). The original cisco cpu was a slightly upgraded 68000 version. Andy Bechtolsheim was using SUDS on the triple-I in the CS Dungeon (Margaret Jacks Hall) when my boss asked him to modify the sun board to accept 256k ram chips. I handed Andy a pencil and the schematics and he scribbled the mods on it. I took the mods, and with exacto knife and jumpers, modified a sun board for the 256k chips. Len Bosack then took the mods and relaid out the PC. That board was the first cisco cpu, and was also produced internally to Stanford. [...] The original sun lacked the DVMA and thus needed Multibus memory. Their "ar" tape controller design thus included 256k of Multibus memory. When upgraded to a sun2, one had to switch this ar-resident memory off since it would conflict with the DVMA memory on the sun2 P2 (memory bus). MODELS Sun-1 Processor(s): 68000 Notes: Large black desktop boxes with 17" monitors. Uses the original Stanford-designed video board and a parallel microswitch keyboard (type 1) and parallel mouse (Sun-1). 100 Processor(s): 68000 @ 10MHz Bus: Multibus, serial Notes: Uses a design similar to original SUN (Stanford University Network) CPU. The version 1.5 CPU can take larger RAMs. 100U Processor(s): 68010 @ 10MHz CPU: 501-1007 Bus: Multibus, serial Notes: "Brain transplant" for 100 series. Replaced CPU and memory boards with first-generation Sun-2 CPU and memory boards so original customers could run SunOS 1.x. Still has parallel kb/mouse interface so type 1 keyboards and Sun-1 mice could be connected. 170 Processor(s): 68010? Bus: Multibus? Chassis type: rackmount Notes: Server. Slightly different chassis design than 2/170's Sun-2 ----- OVERVIEW Sun-2's were introduced in the early 1980's and were Sun's first major commercial success. While not as popular or as common as the later Sun-3's, they did well and there are still quite a few in circulation in the home/collector-used market. All Sun-2's are based on the Motorola 68010 and run SunOS. The last version of SunOS to support Sun-2's was 4.0.3. Early Sun-2's were Multibus; later models were VME, which Sun continued to use through the Sun-3 era and well into the Sun-4 line. One of the hardest parts of restoring a Sun-2 is finding OS tapes for it. The hardware is usually still in fine working order, but tapes -- if you can even find any -- are sometimes unreadable after so many years. See author's notes in the appendices. MODELS 2/120 Processor(s): 68010 @ 10MHz CPU: 501-1007/1051 Chassis type: deskside Bus: Multibus, 9 slots Memory: 7M physical with mono video, 8M without Notes: First machines in deskside chassis. Serial microswitch keyboard (type 2), Mouse Systems optical mouse (Sun-2). 2/170 Processor(s): 68010 @ 10MHz CPU: 501-1007/1051 Chassis type: rackmount Bus: Multibus, 15 slots Memory: 7M physical with mono video, 8M without Notes: Server. 2/50 Processor(s): 68010 @ 10MHz CPU: 501-1141/1142/1143 Chassis type: wide pizza box Bus: VME, 2 slots Memory: 7M physical Notes: Optional SCSI board (model name is SCSI-2 because it is the second SCSI design; the first was for 2/1xx's) sits on memory expansion board in second slot. CPU board has 1, 2, or 4M, Ethernet, two serial ports. The (type 2) keyboard and mouse attach via an adapter that accepts two modular plugs and attaches to a DB15 port. 2/130 2/160 Processor(s): 68010 CPU: 501-1144/1145/1146 Chassis type: deskside Bus: VME, 12 slots Memory: 7M physical Notes: First machine in 12-slot deskside VME chassis. Has four-fan cooling tray instead of six as in later machines, which led to cooling problems with lots of cards. Also has only four P2 memory connectors bussed instead of six. 2/160 upgradeable to a 3/160 by replacing the CPU board. No information on the differences between the 2/130 and the 2/160. Sun-3 ----- OVERVIEW Sun switched to using the Motorola 68020 with the introduction of the Sun-3's. A few later models had 68030's, but by that time Sun was already moving toward SPARC processors. All models either have a 68881 or 68882 FPU installed stock or at least have a socket for one. All models which are not in pizza box chassis are VMEbus. Two out of three pizza box models have a "P4" connector which can take a framebuffer; the exception is the 3/50. Support for Sun-3's was introduced in SunOS 3.0. The last version of SunOS to support Sun-3's was 4.1.1U1. During the Sun-3 era, Sun introduced the handy practice of putting the model number on the Sun badge on the front of the chassis. There are two different kernel architectures in the Sun-3 model line. All 68020-based models are "sun3" architecture; 68030-based models (the 3/80 and 3/4xx) are "sun3x" architecture. MODELS 3/160 Processor(s): 68020 @ 16.67MHz, 68881, Sun-3 MMU, 8 hardware contexts, 2 MIPS CPU: 501-1074/1096/1163/1164/1208 Chassis type: deskside Bus: VME, 12 slots Memory: 16M physical (documented), 256M virtual, 270ns cycle Notes: First 68020-based Sun machine. Uses the 3004 "Carrera" CPU, which is used in most other Sun 3/1xx models and the 3/75. Sun supplied 4M memory expansion boards; third parties had up to 32M on one card. SCSI optional. One variant of the memory card holds a 6U VME SCSI board; there is also a SCSI board which sits in slot 7 of the backplane and runs the SCSI bus out the back of the backplane to the internal disk/tape (slot 6 in very early backplanes). CPU has two serial ports, Ethernet, keyboard. Type 3 keyboard plugs into the CPU; Sun-3 mouse plugs into the keyboard. Upgradeable to a 3/260 by replacing CPU and memory boards. 3/75 Processor(s): 68020 @ 16.67MHz, 68881, Sun-3 MMU, 8 hardware contexts, 2 MIPS CPU: 501-1074/1094/1163/1164 Chassis type: wide pizza box Bus: VME, 2 slot Memory: 16M physical (documented), 256M virtual, 270ns cycle Notes: Optional SCSI sits on memory expansion board in second slot. 3/140 Processor(s): 68020 @ 16.67MHz, 68881, Sun-3 MMU, 8 hardware contexts, 2 MIPS CPU: 501-1074/1094/1163/1164/1208 Chassis type: deskside Bus: VME, 3 slots Memory: 16M physical (documented), 256M virtual, 270ns cycle 3/150 Processor(s): 68020 @ 16.67MHz, 68881, Sun-3 MMU, 8 hardware contexts, 2 MIPS CPU: 501-1074/1094/1163/1164/1208 Chassis type: deskside Bus: VME, 6 slots Memory: 16M physical (documented), 256M virtual, 270ns cycle 3/180 Processor(s): 68020 @ 16.67MHz, 68881, Sun-3 MMU, 8 hardware contexts, 2 MIPS CPU: 501-1074/1094/1163/1164/1208 Chassis type: rackmount Bus: VME, 12 slots Memory: 16M physical (documented), 256M virtual, 270ns cycle Notes: Rackmount version of 3/160. Upgradeable to a 3/280 by replacing the CPU and memory boards. Very early backplanes have the special SCSI hookup on slot 6 rather than 7. 3/110 Processor(s): 68020 CPU: 501-1134/1209 Chassis type: deskside Bus: VME, 3 slots Notes: Similar to the "Carerra" CPU, but has 8-bit color framebuffer (cgfour) on board and uses 1M RAM chips for 4M on-CPU memory. Code-named "Prism". 3/50 Processor(s): 68020 @ 15.7MHz, 68881 (socket for 501-1075/1133/1162, installed for 501-1207), Sun-3 MMU, 8 hardware contexts, 1.5 MIPS CPU: 501-1075/1133/1162/1207 Chassis type: wide pizza box Bus: none Memory: 4M physical (documented), 256M virtual, 270ns cycle Notes: Cycle-stealing monochrome frame buffer. 4M memory maximum stock, but third-party memory expansion boards were sold, allowing up to at least 12M. No bus or P4 connector. Onboard SCSI. Thin coax or AUI Ethernet. Code-named "Model 25". 3/60 Processor(s): 68020 @ 20MHz, 68881 (stock), Sun-3 MMU, 8 hardware contexts, 3 MIPS CPU: 501-1205/1322/1334/1345 Chassis type: wide pizza box Bus: P4 connector (not same as P4 on 3/80) Memory: 24M physical, 256M virtual, 200ns cycle Notes: VRAM monochome frame buffer for 501-1205/1334. Optional color frame buffer (can run mono and color simultaneously) on P4 connector. Onboard SCSI. SIMM memory (100ns 1M x 9 SIMMs). High (1600 * 1100) or low (1152 * 900) resolution mono selectable by jumper. Thin coax or AUI Ethernet. Code-named "Ferrari". 4M stock on 501-1205/1322, 0M stock on 501-1322/1345. 3/60LE Processor(s): 68020 @ 20MHz, 68881 (stock), Sun-3 MMU, 8 hardware contexts, 3 MIPS CPU: 501-1378 Bus: P4 connector (not same as P4 on 3/80) Memory: 12M physical, 256M virtual, 200ns cycle Notes: A version of the 3/60 with no onboard framebuffer and limited to 12M of RAM (4M of 256K SIMMs and 8M of 1M SIMMs). 3/260 Processor(s): 68020 @ 25MHz, 68881 @ 20MHz (stock), Sun-3 MMU, 8 hardware contexts, 4 MIPS CPU: 501-1100/1206 Chassis type: deskside Bus: VME, 12 slot Memory: 64M (documented) physical with ECC, 256M virtual; 64K write-back cache, direct-mapped, virtually-indexed and virtually-tagged, with 16-byte lines; 80ns cycle Notes: Two serial ports, AUI Ethernet, keyboard, and video on CPU. Video is mono, high-resolution only. Sun supplied 8M memory boards. Sun 4/2xx 32M boards work up to 128M. First Sun with an off-chip cache. Upgradeable to a 4/260 by replacing the CPU board. Code-named "Sirius". 3/280 Processor(s): 68020 @ 25MHz, 68881 @ 20MHz (stock), Sun-3 MMU, 8 hardware contexts, 4 MIPS CPU: 501-1100/1206 Chassis type: rackmount Bus: VME, 12 slot Memory: 64M (documented) physical with ECC, 256M virtual; 64K write-back cache, direct-mapped, virtually-indexed and virtually-tagged, with 16-byte lines; 80ns cycle Notes: Rackmount version of the 3/260. Upgradeable to a 4/280 by replacing the CPU board. Code-named "Sirius". 3/80 Processor(s): 68030 @ 20MHz, 68882 @ 20MHz, 68030 on-chip MMU, 3 MIPS, 0.16 MFLOPS CPU: 501-1401/1650 Chassis type: square pizza box Bus: P4 connector (not same as P4 on 3/60) Memory: 16M or 40M physical, 4G virtual, 100ns cycle Notes: Similar packaging to SparcStation 1. Parallel port, SCSI port, AUI Ethernet, 1.44M 3.5" floppy (720K on early units?). No onboard framebuffer. Code-named "Hydra". Type-4 keyboard and Sun-4 mouse, plugged together and into the machine with a small DIN plug. 1M x 9 30-pin 100ns SIMMs. Boot ROM versions 3.0.2 and later allow using 4M SIMMs in some slots for up to 40M (see Misc Q&A #15). 3/460 Processor(s): 68030 @ 33 MHz, 68882, 68030 on-chip MMU, 7 MIPS, 0.6 MFLOPS CPU: 501-1299/1550 Bus: VME Memory: 128M physical with ECC, 4G/process virtual, 64K cache, 80ns cycle Notes: A 3/260 upgraded with a 3/4xx CPU board. Uses original 3/2xx memory boards. 3/470 Processor(s): 68030 @ 33 MHz, 68882, 68030 on-chip MMU, 7 MIPS, 0.6 MFLOPS CPU: 501-1299/1550 Chassis type: deskside Bus: VME Memory: 128M physical with ECC, 4G/process virtual, 64K cache, 80ns cycle Notes: Rare. Code-named "Pegasus". 8M standard, uses same memory boards as 3/2xx. 3/480 Processor(s): 68030 @ 33 MHz, 68882, 68030 on-chip MMU, 7 MIPS, 0.6 MFLOPS CPU: 501-1299/1550 Chassis type: rackmount Bus: VME Memory: 128M physical with ECC, 4G/process virtual, 64K cache, 80ns cycle Notes: Rare. Code-named "Pegasus". 8M standard, uses same memory boards as 3/2xx. 3/E Processor(s): 68020 CPU: 501-8028 Bus: VME Notes: Single-board VME Sun-3, presumably for use as a controller, not as a workstation. 6U form factor. Serial and keyboard ports. External RAM, framebuffer, and SCSI/ethernet boards available. Sun 386i -------- OVERVIEW The Sun 386i models, based on the Intel 80386 processor, were introduced when 80386-based IBM PC/AT clones were starting to become widespread. Intel had finally produced a chip sufficiently capable (32-bit, among other things) to allow porting SunOS, and using an Intel processor and an ISA bus offered the ability to run MS-DOS applications without speed-draining emulation. Unfortunately, they were a dismal failure. Support for Sun-386i's was introduced in SunOS 4.0 (?). The 386i SunOS releases came from Sun's East Coast division, so 386i SunOS was not identical to the standard version with the same number. The last released version of SunOS to support Sun-386i's was 4.0.2; there are a few copies of 4.0.3Beta (with OpenLook 2.0) floating around. MODELS 386i/150 Processor(s): 80386 @ 20MHz, 80387, 80386 on-chip MMU, 3 MIPS, 0.17 MFLOPS CPU: 501-1241/1414 Chassis type: tower (20"H * 7"W * 16"D) Bus: 4 32-bit slots; ISA (3 16-bit, 1 8-bit) Memory: 8M physical Notes: Shared code name "Roadrunner" with the /250. The frame buffer was not on the ISA bus. 720K or 1.44M 3.5" floppy. A variant of the 150 had the 250's external cache. 386i/250 Processor(s): 80386 @ 25MHz, 80387, 80386 on-chip MMU, 5 MIPS, 0.2 MFLOPS CPU: 501-1324/1413 Chassis type: tower Bus: 4 32-bit slots; ISA (3 16-bit, 1 8-bit) Memory: 16M physical, 32K cache Notes: Shared code name "Roadrunner" with the /150. The frame buffer was not on the ISA bus. 720K or 1.44M 3.5" floppy. 486i Processor(s): 80486 Notes: Code-named "Apache". A very limited quantity of these were supposedly built and shipped to customers just before the Intel-based line was cancelled. Sun-4/SPARCstation/SPARCserver/SPARCwhatever -------------------------------------------- OVERVIEW These machines were initially introduced with model designations in the same pattern as previous lines: Sun 4/xxx. However, for marketing purposes, Sun departed from their classic naming scheme with the name SPARCstation, and has since experimented with alphabetic designations (e.g. "SPARCstation SLC") before returning to numbered SPARCstations. Until the SPARCstation 10, however, every model still had a 4/xxx designation as well, which is displayed by the ROM monitor during power-up and used by much of Sun's documentation. This model line marks the introduction of Sun's own RISC chip, the SPARC. There have been a number of different implementations of the chip from various manufacturers, with varying degrees of hardware support for the instruction set. Support for Sun-4's was introduced in SunOS 4.0, although there was a special variant of SunOS 3.2 for Sun-4's which was shipped with some very early units. Since this product line is still current, it is still in general supported by SunOS, which has mutated to become part of Solaris. Support for some earlier models has been dropped, and some later models require at least 4.0.3c, 4.1.1, or Solaris 2.x. Some of the later models have pictures silkscreened on their CPU boards. Note that MIP/GIP ratings for later models are even more suspicious than usual for benchmarks. There are several kernel architectures in the Sun-4 model line. Where known, the architecture for each model is listed. MODELS 4/260 Processor(s): SF9010 @ 16.67MHz, Weitek 1164/1165, Sun-4 MMU, 16 hardware contexts, 10 MIPS, 1.6 MFLOPS CPU: 501-1274/1491/1522 Chassis type: deskside Bus: VME, 12 slot Memory: 128M physical with ECC, 1G/process virtual, 60ns cycle Architecture: sun4 Notes: First SPARC machine. Code-named "Sunrise". Cache much like Sun-3/2xx, uses same memory boards. 4/110 Processor(s): MB86900 @ 14.28MHz, Weitek 1164/1165, Sun-4 MMU, 16 hardware contexts, 7 MIPS CPU: 501-1199/1237/1462/1463/1464/1465/1512/1513/ 1514/1515/1516/1517/1656/1657/1658/1659/ 1660/1661 Chassis type: deskside Bus: VME, 3 slot Memory: 32M physical with parity, 1G/process virtual, 70ns cycle Architecture: sun4 Notes: First desktop-able SPARC. CPU doesn't support VME busmaster cards (insufficient room on CPU board for full VME bus interface), so DMA disk and tape boards won't work with it. Originally intended as single-board machine, although there are a few slave-only VME boards (such as the ALM-2 and second ethernet controller) which work with it. Onboard SCSI, two serial ports, Ethernet, keyboard/mouse. "P4" frame buffer could be monochrome or color. Used static column RAM rather than a conventional cache. Code-named "Cobra". CPUs 501-1199/1462/1464/1512/1514/1516/ 1656/1658/1660 do not have an FPU; 501-1237/ 1463/1465/1513/1515/1517/1657/1659/1661 have an FPU. 4/280 Processor(s): SF9010 @ 16.67MHz, Weitek 1164/1165, Sun-4 MMU, 16 hardware contexts, 10 MIPS, 1.6 MFLOPS CPU: 501-1274/1491/1522 Chassis type: rackmount Bus: VME, 12 slot Memory: 128M physical with ECC, 1G/process virtual, 60ns cycle Architecture: sun4 Notes: Rackmount version of 4/260. 4/150 Notes: 4/110 CPU in a 3/150 chassis. SPARCstation 1 (4/60) Processor(s): MB86901A or LSI L64801 @ 20MHz, Weitek 3170, Sun-4c MMU, 8 hardware contexts, 12.5 MIPS, 1.4 MFLOPS, 10 SPECmark89 CPU: 501-1382/1629 Chassis type: square pizza box Bus: SBus @ 20MHz, 3 slots (slot 3 slave-only) Memory: 64M physical with synchronous parity, 512M/process virtual; 64K write-through cache, direct-mapped, virtually indexed, virtually tagged, 16-byte lines; 50ns cycle Architecture: sun4c Notes: Code name "Campus". 1M or 4M x 9 30-pin 100ns SIMMs, in four banks. 720K or 1.44M (?) 3.5" floppy. First supported in SunOS 4.0.3c. SPARCserver 1 Notes: SPARCstation 1 without a monitor/framebuffer. 4/330 (SPARCstation 330, SPARCserver 330) Processor(s): CY7C601 @ 25MHz, TI8847, Sun-4 MMU, 16 hardware contexts, 16 MIPS, 2.6 MFLOPS, 11.3 SPECmark89 CPU: 501-1316/1742 Bus: VME Memory: 56M/72M physical with synchronous parity, 1G/process virtual, 128K cache, 40ns cycle Architecture: sun4 Notes: Onboard SCSI, serial ports. Uses SIMMs. Cache similar to 4/2xx but write-through. Code-named "Stingray". 56M limit only for early versions of ROM. 1M or 4M x 9 30-pin SIMMs, 100ns. 4/310 Notes: 4/3xx CPU in a 4/110 chassis. 4/350 Notes: 4/3xx CPU in a 3/150 chassis. 4/360 Processor(s): CY7C601 @ 25MHz, TI8847, Sun-4 MMU, 16 hardware contexts, 16 MIPS, 2.6 MFLOPS, 11.3 SPECmark89 CPU: 501-1316/1742 Chassis type: deskside Bus: VME, 12 slots Memory: 56M+ physical with synchronous parity, 1G/process virtual, 128K cache, 40ns cycle Architecture: sun4 Notes: 4/260 upgraded with a 4/3xx CPU. Onboard SCSI, serial ports. Uses SIMMs. Cache similar to 4/2xx but write-through. Code-named "Stingray". Room for SCSI disk in top of chassis. 56M limit only for early versions of ROM. 1M or 4M x 9 30-pin SIMMs, 100ns. 4/370 (SPARCstation 370, SPARCserver 370) Processor(s): CY7C601 @ 25MHz, TI8847, Sun-4 MMU, 16 hardware contexts, 16 MIPS, 2.6 MFLOPS, 11.3 SPECmark89 CPU: 501-1316/1742 Bus: VME, 12 slots Memory: 56M+ physical with synchronous parity, 1G/process virtual, 128K cache, 40ns cycle Architecture: sun4 Notes: Onboard SCSI, serial ports. Uses SIMMs. Cache similar to 4/2xx but write-through. Code-named "Stingray". Room for up to four SCSI disks in top of chassis. 56M limit only for early versions of ROM. 1M or 4M x 9 30-pin SIMMs, 100ns. 4/380 Notes: 4/280 upgraded with 4/3xx CPU. 4/390 (SPARCserver 390) Processor(s): CY7C601 @ 25MHz, TI8847, Sun-4 MMU, 16 hardware contexts, 16 MIPS, 2.6 MFLOPS, 11.3 SPECmark89 CPU: 501-1316/1742 Bus: VME Memory: 56M+ physical with synchronous parity, 1G/process virtual, 128K cache, 40ns cycle Architecture: sun4 Notes: Onboard SCSI, serial ports. Uses SIMMs. Cache similar to 4/2xx but write-through. Code-named "Stingray". 56M limit only for early versions of ROM. 1M or 4M x 9 30-pin SIMMs, 100ns. 4/470 (SPARCstation 470, SPARCserver 470) Processor(s): CY7C601 @ 33MHz, TI8847 (?), 64 hardware contexts, 22 MIPS, 3.8 MFLOPS, 17.6 SPECmark89 CPU: 501-1381/1899 Bus: VME Memory: 96M physical, 128K cache Architecture: sun4 Notes: Write-back rather than write-through cache, 3-level rather than 2-level Sun-style MMU. Code-name "Sunray" (which was also the code name for the 7C601 CPU). 4/490 (SPARCserver 490) Processor(s): CY7C601 @ 33MHz, TI8847 (?), 64 hardware contexts, 22 MIPS, 3.8 MFLOPS, 17.6 SPECmark89 CPU: 501-1381/1899 Bus: VME Memory: 96M physical, 128K cache Architecture: sun4 Notes: Write-back rather than write-through cache, 3-level rather than 2-level Sun-style MMU. Code-name "Sunray" (which was also the code name for the 7C601 CPU). SPARCstation SLC (4/20) Processor(s): MB86901A or LSI L64801 @ 20MHz, 12.5 MIPS, 1.2 MFLOPS, 8.6 SPECmark89 CPU: 501-1627/1680/1720/1748 (1776/1777 ?) Chassis type: monitor Bus: none Memory: 16M physical; 64K write-through cache, direct-mapped, virtually indexed, virtually tagged, 16-byte lines Architecture: sun4c Notes: Code name "Off-Campus". 4M x 33 72-pin SIMMs. No fan. 17" mono monitor built in. Has audio, keyboard, A/B serial (in same DB25), SCSI-2, and AUI Ethernet connectors. First supported in SunOS 4.0.3c. SPARCstation IPC (4/40) Processor(s): MB86901A or LSI L64801 @ 25MHz, 13.8 SPECint92, 11.1 SPECfp92, 327 SPECintRate92, 263 SPECfpRate92 CPU: 501-1689/1835/1870/1974 (1690?) Chassis type: lunchbox Bus: SBus @ 25MHz, 2 slots Memory: 48M physical; 64K write-through cache, direct-mapped, virtually indexed, virtually tagged, 16-byte lines Architecture: sun4c Notes: Code name "Phoenix". 1M or 4M x 9 30-pin 100ns SIMMs, three banks. Onboard mono frame buffer. 1.44M 3.5" floppy. First supported in SunOS 4.0.3c. SPARCstation 1+ (4/65) Processor(s): LSI L64801 @ 25MHz, Weitek 3172, Sun-4c MMU, 8 hardware contexts, 15.8 MIPS, 1.7 MFLOPS, 12 SPECmark89 CPU: 501-1632 Chassis type: square pizza box Bus: SBus @ 25MHz, 3 slots (slot 3 slave-only) Memory: 64M (40M?) physical with synchronous parity, 512M/process virtual; 64K write-through cache, direct-mapped, virtually indexed, virtually tagged, 16-byte lines; 50ns cycle Architecture: sun4c Notes: Code name "Campus B". 1M or 4M x 9 30-pin 100ns SIMMs, in four banks. 1.44M 3.5" floppy. Essentially same as SPARCstation 1, just faster clock and improved SCSI controller. First supported in SunOS 4.0.3c. SPARCserver 1+ Notes: SPARCstation 1+ without a monitor/framebuffer. SPARCstation 2 (4/75) Processor(s): CY7C601 @ 40MHz, TI TMS390C601A (602A ?), Sun-4c MMU, 16 hardware contexts, 28.5 MIPS, 4.2 MFLOPS, 21.8 SPECint92, 22.8 SPECfp92, 517 SPECintRate92, 541 SPECfpRate92 CPU: 501-1638/1744/1858/1859/1912/1926/1989/1995 Chassis type: square pizza box Bus: SBus @ 20MHz, 3 slots Memory: 64M physical on motherboard/128M total, 64K write-through cache, direct-mapped, virtually indexed, virtually tagged, 32-byte lines Architecture: sun4c Notes: Code name "Calvin". 4M x 9 30-pin 80ns SIMMs, in four banks. Case slightly larger and has more ventilation. (Some models apparently have LSI L64811 @ 40MHz?) Expansion beyond 64M is possible with a 32M card which can take a 32M daughterboard (card blocks SBus slot). First supported in SunOS 4.1.1. SPARCserver 2 Notes: SPARCstation 2 without a monitor/framebuffer. SPARCstation ELC (4/25) Processor(s): Fujitsu MB86903 or Weitek W8701 @ 33MHz, FPU on CPU chip, Sun-4c MMU, 8 hardware contexts, 21 MIPS, 3 MFLOPS, 18.2 SPECint92, 17.9 SPECfp92, 432 SPECintRate92, 425 SPECfpRate92 CPU: 501-1861 (1730?) Chassis type: monitor Bus: none Memory: 64M physical; 64K write-through cache, direct-mapped, virtually indexed, virtually tagged, 32-byte lines Architecture: sun4c Notes: Code name "Node Warrior". 4M or 16M x 33 72-pin SIMMs. No fan. 17" mono monitor built in. first supported in SunOS 4.1.1c. SPARCstation IPX (4/50) Processor(s): Fujitsu MB86903 or Weitek W8701 @ 40MHz, FPU on CPU chip, Sun-4c MMU, 8 hardware contexts, 28.5 MIPS, 4.2 MFLOPS, 21.8 SPECint92, 21.5 SPECfp92, 517 SPECintRate92, 510 SPECfpRate92 CPU: 501-1780/1810/1959/2044 Chassis type: lunchbox Bus: SBus @ 20MHz, 2 slots Memory: 64M physical; 64K write-through cache, direct-mapped, virtually indexed, virtually tagged, 32-byte lines Architecture: sun4c Notes: Code name "Hobbes". 4M or 16M x 33 72-pin SIMMs. Onboard GX-accelerated cg6 color framebuffer (not usable with ECL mono monitors, unlike SBus version). Picture of Hobbes (from Watterson's "Calvin and Hobbes" comic strip) silkscreened on motherboard. 1.44M 3.5" floppy. First supported in SunOS 4.1.1 (may require IPX supplement). SPARCengine 1 (4/E) CPU: 501-8035/8058/8064 Bus: SBus, 1 slot Notes: Basically a SPARCstation 1 (or 1+?) with a VME interface and 8K rather than 4K pages. Sold as a 6U VME board. Code name "Polaris". SPARCserver 6xxMP/xx Processor(s): Mbus modules CPU: 501-1686/2055 Chassis type: rackmount Bus: VME; SBus @ 20MHz; and Mbus Memory: 640M physical Architecture: sun4m Notes: First Mbus-based machine. Cypress/ROSS Mbus modules later upgraded to TI SuperSPARC modules (/xx models). Code name "Galaxy". Up to four CPUs. 4M or 16M x 9 80ns 30-pin SIMMs. SPARCclassic (SPARCclassic Server)(SPARCstation LC) (4/15) Processor(s): microSPARC @ 50MHz, 59.1 MIPS, 4.6 MFLOPS, 26.4 SPECint92, 21.0 SPECfp92, 626 SPECintRate92, 498 SPECfpRate92 CPU: 501-2200/2262/2326 Chassis type: lunchbox Bus: SBus @ 20MHz, 2 slots Memory: 96M physical Architecture: sun4m Notes: Sun4m architecture, but no Mbus. Shares code name "Sunergy" with LX. Uniprocessor only. 1.44M 3.5" floppy. Soldered CPU chip. Onboard cgthree framebuffer, AMD79C30 8-bit audio chip. Takes pairs of 4M or 16M 60ns SIMMs. First supported in SunOS 4.1.3c. SPARCclassic X (4/10) CPU: 501-2079/2262/2313 Notes: Essentially the same as SPARCclassic, but intended for use as an X terminal (?). SPARCstation LX/ZX (4/30) Processor(s): microSPARC @ 50MHz, 59.1 MIPS, 4.6 MFLOPS, 26.4 SPECint92, 21.0 SPECfp92, 626 SPECintRate92, 498 SPECfpRate92 CPU: 501-2031/2032/2233/2474 Chassis type: lunchbox Bus: SBus @ 20MHz, 2 slots Memory: 96M physical Architecture: sun4m Notes: Sun4m architecture, but no Mbus. Shares code name "Sunergy" with SPARCclassic. Uniprocessor only. Takes pairs of 4M or 16M 60ns SIMMs. Soldered CPU chip. Onboard cgsix framebuffer, 1M VRAM standard, expandable to 2M. DBRI 16-bit audio/ISDN chip. First supported in SunOS 4.1.3c. SPARCstation Voyager Processors(s): microSPARC II @ 60MHz, 47.5 SPECint92, 40.3 SPECfp92, 1025 SPECintRate92, 859 SPECfpRate92 Bus: SBus; PCMCIA type II, 2 slots Memory: 80M physical Architecture: sun4m Notes: Portable (laptop?). 16M standard, two memory expansion slots for Voyager-specific SIMMs (16M or 32M). Code-named "Gypsy". 14" 1152x900 mono or 12" 1024x768 color flat panel displays. DBRI 16-bit audio/ISDN chip. SPARCserver 10/xx Notes: SPARCstation 10/xx without monitor/framebuffer. SPARCstation 3 Notes: Although this model appeared in a few Sun price lists, it was renamed the SPARCstation 10 before release. SPARCstation 10/xx Processor(s): up to two Mbus modules Motherboard: 501-1733/2259/2274/2365 (-2274 in model 20 only) Chassis type: square pizza box Bus: SBus @ 16.6/20MHz (model 20) or 18/20MHz, 4 slots; and Mbus, 2 slots Memory: 512M physical Architecture: sun4m Notes: Code name "Campus-2". 1.44M 3.5" floppy. Up to four CPUs, some models with multiple CPUs stock. 16M or 64M 70ns SIMMs. Some models (514, others?) use double-width CPU modules which block SBus slots. model MHz SPECint92 SPECfp92 SPECint SPECfp ----- --- --------- -------- -Rate92--Rate92- 10/20 33 39.8 46.6 943 1104 10/30 36 45.2 54.0 1072 1282 10/40 40 50.2 60.2 1191 1427 10/402 40x2 2112 2378 10/41 40 53.2 67.8 1264 1607 10/412 40x2 2411 2854 10/51 50 65.2 83.0 1580 2008 10/512 50x2 2950 3744 10/514 50x4 5155 5809 10/52 45x2 announced but never shipped 10/54 45x4 announced but never shipped 10/61 10/612 10/71 10/712 SPARCcenter 2000 Processor(s): Mbus modules Motherboard: 501-1866/2334/2362 Bus: XDBus * 2, 20 slots; SBus @ 20MHz, 4 slots/motherboard; Mbus, 2 slots/motherboard Memory: 5G physical Architecture: sun4d Notes: Dual XDBus backplane with 20 slots. One board type that carries dual Mbus SPARC modules with 2M cache (1M for each XDBus), 512M memory and 4 SBus modules. Any combination can be used; memory is *not* tied to the CPU modules but to the XDBus. Solaris 2.x releases support an increasing number of CPUs (up to full twenty), due to tuning efforts in the kernel. First supported in Solaris 2.2 (SunOS 5.2). Code name "Dragon". 2.19 GIPS, 269 MFLOPS. model MHz SPECint92 SPECfp92 SPECint SPECfp ----- --- --------- -------- -Rate92--Rate92- 2108 40x8 8047 10600 2216 50x16 21196 28064 SPARCclassic M Processor(s); microSPARC @ 50MHz Memory: 96M physical Notes: 16M standard. SPARCstation 10M Processor(s): SuperSPARC @ 36MHz, 86.1 MIPS Bus: SBus, Mbus Memory: 512M physical, 32K cache Notes: 32M standard. 1.44M 3.5" floppy. SPARCserver 1000 Processor(s): Mbus modules Motherboard: 501-2336 (2338?) Bus: XDBus; SBus @ 20MHz, 3 slots/motheboard; Mbus, 2 slots/motherboard Memory: 2G physical, 1M off-chip cache Architecture: sun4d Notes: Single XDBus design with "curious L-shaped motherboards". Three SBus slots, onboard FSBE, 512M, two CPU modules per motherboard. Four motherboards total, or a disk tray with four 535M 1" high 3.5" disks (1G disks supported recently). Code name "Scorpion". 135 MIPS. First supported in Solaris 2.2 (SunOS 5.2). model MHz SPECint92 SPECfp92 SPECint SPECfp ----- --- --------- -------- -Rate92--Rate92- 1102 50x2 2730 3681 1104 50x4 5318 7076 1108 50x8 10113 12710 SPARCcluster 1 Processor(s): SuperSPARC @ 45MHz, 86.1 MIPS Bus: SBus Memory: 1M off-chip cache Notes: 512M standard. A bunch of SPARCstation 10's glued together with an switch (Alantec? Kalpana?). SPARCstation 5 Processor(s): microSPARC II @ 70MHz, 85MHz, 110MHz; 57.0/64.0/? SPECint92, 47.3/54.6/? SPECfp92, 1352/1518/? SPECintRate92, 1122/1295/? SPECfpRate92 Bus: SBus Memory: 256M physical Architecture: sun4m Notes: 16M standard in 70MHz model, 32M standard in 85MHz model. 8 SIMM slots, 8M or 32M SIMMs, mixable except that any 32M SIMMs must be in slots before any 8M SIMMs. Code name "Aurora". Uses SCA connectors (see Misc Q&A #29) for internal SCSI drives. Socketed CPU chip. SPARCserver 5 Notes: SPARCstation 5 without monitor/framebuffer. SPARCserver 20 Notes: SPARCstation 20 without monitor/framebuffer. SPARCstation 20M Processor(s): SuperSPARC @ 50MHz, 86.1 MIPS Bus: SBus, MBus Memory: 512M physical, 32K off-chip cache Notes: 32M standard. 1.44M 3.5" floppy. SPARCstation 20/xx Processor(s): Mbus modules Bus: SBus and Mbus; SBus for models 50 and 61 (and possibly others?) @ 25MHz/64bits Memory: 512M physical Architecture: sun4m Notes: 1.44M 3.5" floppy. 32M standard all models. Code name "Kodiak". Uses SCA connectors (see Misc Q&A #29) for internal SCSI drives. 16, 32, or 64M 60ns SIMMs. Some models (514, others?) use double-width CPU modules that block SBus slots. model MHz SPECint92 SPECfp92 SPECint SPECfp ----- --- --------- -------- -Rate92--Rate92- 20/50 50 69.2 78.3 1628 1842 20/502 50x2 2833 2995 20/51 50 73.6 84.8 1731 1995 20/514 50x4 6034 6752 20/61 60 88.9 102.8 2092 2418 20/612 60x2 3903 4645 20/71 20/712 SPARCstation 4 Processor(s): MicroSPARC II @ 70MHz Bus: SBus, 1 slot Architecture: sun4m Notes: Optional 16-bit audio, onboard framebuffer. Processor Data -------------- SPARC register overview From John Cheshire (john@float.demon.co.uk): SPARC registers can be divided into two general classifications: working registers and control/status registers. Working registers are those used for data and addressing operations. They are called r-registers in the integer unit (IU), or f-registers in the floating-point unit. The various control/status registers record status or control the state of a processor or memory management unit (MMU). The 136 r-registers of the integer unit are divided into eight register windows. The 32 f-registers of the floating-point unit are a directly addressed register file (referred to as freg0...freg31). All registers for SPARC are 32 bits in length, although floating-point double-precision instructions allow an adjacent and aligned floating-point data register pair to be accessed as a single 64-bit register. Also note that while all control registers are 32 bits in length, some of the bit fields may be designated as reserved. Reserved bits are non-writable, and are returned as zero when when the register is read. It is good programming practice to write zeros into a reserved bit field when writing to a control register of this type. This practice avoids upgrade problems with later hardware versions. The 136 r-registers of the [Ross] RT620 are 32 bits wide and are divided into a set of 128 window registers and a set of eight global registers. The 128 window registers are grouped into eight sets of 24 r-registers called windows. One of these eight windows is selected by setting the Current Window Pointer (CWP), a 5-bit field in the processor state register (PSR). Within each window, the programmer can directly access 24 windowed r-registers by register number. The eight global registers may be accessed regardless of the window selected by the CWP. Register Alternate Register Number Register Number Group Name -------- --------------- ---------- r[24] to r[31] i[0] to i[7] ins r[16] to r[23] l[0] to l[7] locals r[8] to r[15] o[0] to o[7] outs r[0] to r[7] g[0] to g[7] globals The windowed register file is implemented as a circular stack, with the highest numbered window joined to the lowest. For the eight windows implemented in SPARC, window 7 adjoins window 0. Note that each window shares its ins and outs with adjacent windows. Outs from a previous window (CWP+1) are the ins of the current window, and the outs of the current window are the ins of the next window (CWP-1). While only adjacent windows share ins and outs, globals are shared by all windows. A window's locals, on the other hand, are not shared at all, belonging only to that window. An alternative approach to understanding SPARC window registers is to note that the Current Window Pointer (CWP) acts as an index pointer within the stack of 128 window registers. Changing the Current Window Pointer by one offsets the r-register addressing by 16. Since 24 r-registers can be addressed with each CWP value, incrementing or decrementing the CWP results in an eight register overlap in register addressing. This overlap of window register addressing creates the in-out feature of the windowed registers. After power-on reset, the state of the Current Window Pointer and the window invalid mask (WIM) register are undefined. The power-on reset trap routine must initialize the CWP and WIM register for correct operation. In addition to the 136 r-registers, SPARC defines a set of 32-bit floating point data registers, referred to as f-registers. The [Ross] RT620 fp register files each provide a set of 32 f-registers. These registers can be accessed as 32 registers containing single precision (32-bit) data types or as 16 pairs of registers containing double precision (64-bit) data types. Double precision pairs are always addressed as adjacent even-odd registers. SuperSPARC Texas Instruments TMX390Z50. On-chip 20K 5-way set-associative I-cache, physically indexed and tagged. On-chip 16K 4-way set-associative D-cache, write-back, physically indexed and tagged. 65536 hardware contexts. FPU and SPARC Reference MMU on chip. SPARC Reference MMU has in-memory 3-level page tables, similar to a "de-baroqued subset" of the 68030 MMU, but with Sun-MMU-style contexts. Code name "Viking". "When the SuperSPARC Multi-Cache Controller is used in the Mbus configuration, it supports either no E-cache or 1MB of E-cache. When the MCC is used in the X[D]Bus configuration, it supports a variety of E-cache sizes: none, 512Kb, 1Mb, or 2Mb." -- Texas Instruments SuperSPARC User's Guide, Alpha release. microSPARC Texas Instruments TMX390S10. On-chip 4K I-cache. On-chip 2K D-cache. 64 hardware contexts. FPU and SPARC Reference MMU on chip. SPARC Reference MMU has in-memory 3-level page tables, similar to a "de-baroqued subset" of the 68030 MMU, but with Sun-MMU-style contexts. Code name "Tsunami". microSPARC II Fujitsu MB86904. On-chip 16K I-cache. On-chip 8K D-cache.FPU and SPARC Reference MMU on chip. SF9010/MB86900 These two are the same chip; Fujitsu simply renamed it. The FPC portion was later given the separate designation MB86910 (?). ROSS RT601/Cypress CY7C601 These two are the same chip, renamed when Cypress sold ROSS Technology to Fujitsu. No on-chip cache. ROSS RT602/Cypress CY7C602 These two are the same chip, renamed when Cypress sold ROSS Technology to Fujitsu. ROSS RT605/Cypress CY7C605 These two are the same chip, renamed when Cypress sold ROSS Technology to Fujitsu. 64K unified cache which can run in either write-through or write-back mode; SunOS/Solaris uses write-back. SPARC Reference MMU with 4096 contexts. hyperSPARC ROSS RT620 IU/FPU and ROSS RT625 MMU/cache controller. On-chip 8K direct-mapped I-cache, 128K or 256K external (?) unified cache which can run in write-through or write-back mode; SunOS/Solaris uses write-back. SPARC Reference MMU with 4096 contexts. Code name "Pinnacle". END OF PART I OF THE SUN HARDWARE REFERENCE