2/50,2/130,2/160 Bit 0 is at the top and bit 7 is at the bottom; the patterns below are shown with bit 0 on the left. Pattern Status Problem -------- ------ ------- 00000000 After complete power-up sequence System running OK 00000001 Finished self-test, setting up to Check CPU first, boot then expansion brd 00000010 Entering user watchdog routine Software bug 00000011 After local memory verified CPU 00000111 After diags, while setting up CPU 00001000 Blinks off and on while NMI OK System running OK 00010001 Testing context registers CPU 00100001 Testing constant data in seg map CPU 00100010 Testing addr dependency in seg map CPU 00100011 Testing data lines in seg map CPU 00110001 Testing constant data in page map CPU 00110011 Testing data lines in page map CPU 00110010 Testing addr dep in page map CPU 01000000 Testing PROM contents CPU or PROMs bad 01010000 Testing SCC chip(s) CPU 01110000 Sizing memory before constant test CPU, then expansion 01110001 Testing constant data in memory CPU, then expansion 01110010 Testing addr dependency in memory CPU, then expansion 01111111 Testing parity circuitry CPU, then expansion 10000001 Testing timer chip CPU 11110001 Setting up memory after diags CPU, then expansion 11110010 Setting up maps after diagnostics CPU 11110011 Setting up frame buffer and video CPU -- check video clock jumper jumpers 11110100 Setting up NMI or keyboard CPU 11111111 A reset sets LEDs to this state CPU or PROMs bad, or "bad device" 3/50 Bit 0 is on the left. The pattern is shown as it appears on the LEDs. Pattern Status Error -------- ------ ----- 11111111 Resetting CPU or PROMs bad 00000000 Test 0: CPU to SCC path CPU board (SCC) bad 10000000 Test 1: boot PROM Boot PROM bad 11000000 Test 3: context register CPU board (MMU) bad 00100000 Test 4: segment map RAM rd/wr CPU board (MMU) bad 10100000 Test 5: segment map RAM CPU board (MMU) bad 01100000 Test 6: page map RAM CPU board (MMU) bad 11100000 Test 7: memory data path CPU board bad 00010000 Test 8: bus error detection CPU board bad 10010000 Test 9: interrupt capability CPU board bad 01010000 Test 10: MMU read access CPU board bad 11010000 Test 11: MMU write access CPU board bad 00110000 Test 12: write to invalid page CPU board bad 10110000 Test 13: write to protected pg CPU board bad 01110000 Test 14: parity error check CPU board bad 11110000 Test 15: parity error check CPU board bad 00001000 Test 16: memory tests CPU board bad 00000001 Self-tests have found an error See below 00000010 An exception class error found See below "Marching ones" (cycling through 10000000, 01000000, 00100000, etc.) indicates that Unix is running OK. On power up, it cycles through the tests in the chart above, then boots Unix. Pattern 11111111 may also mean that a SCSI device was powered up prior to the CPU being powered up. If LED 7 (00000001) lights up while the tests are being performed, it indicates that the test failed. If LED 6 (00000010) lights up while the tests are being performed, it indicates that an unexpected error (bus error, address error, unexpected interrupt, etc.) occurred during the test. When all tests are finished, LED 5 (00000100) starts blinking to indicate that the ROM monitor is running and/or Unix is booting. 3/60,3/60LE Bit 0 is on the right. The pattern is shown as it appears on the LEDs. Pattern Status -------- ------ 11111111 Resetting 00000001 PROM checksum test 00000011 Context register test 00000100 Segment map read/write test 00000101 Segment map address test 00000110 Page map test 00000111 Memory path data test 00001000 Nonexistent memory bus error test 00001001 Interrupt test 00001010 Time-Of-Day clock interrupt test 00001011 MMU protection/status tests 00001110 Parity error test #1 00001111 Parity error test #2 00010000 Memory test 10000000 Self-tests have found an error 01000000 An exception class error occurred "Marching ones" (cycling through 10000000, 01000000, 00100000, etc.) indicates that Unix is running OK. On power up, it cycles through the tests in the chart above, then boots Unix. If LED 7 (10000000) lights up while the tests are being performed, it indicates that the test failed. If LED 6 (01000000) lights up with the tests are being performed, it indicates that an unexpected error (bus error, address error, unexpected interrupt, etc.) occurred during the test. When all tests are finished, LED 5 (00100000) starts blinking to indicate that the ROM monitor is running and/or Unix is booting. 3/2xx Bit 0 is at the top and bit 7 is at the bottom; the patterns below are shown with bit 0 on the left. Pattern Status -------- ------ 11111111 Resetting 10000000 PROM checksum test 01000000 DVMA register test 11000000 Context register test 00100000 Segment map read/write test 10100000 Segment map address test 01100000 Page map test 11100000 Memory path data test 00010000 Nonexistent memory bus error test 10010000 Interrupt test 01010000 Time-Of-Day clock interrupt test 11010000 MMU protection/status tests 00110000 ECC error test 10110000 Cache data 3-pattern test 01110000 Cache tag 3-pattern test 11110000 Memory tests 01001111 Initializing MMU 00000001 Self-tests have found an error 00000010 An exception class error occurred "Marching ones" (cycling through 10000000, 01000000, 00100000, etc.) indicates that Unix is running OK. On power up, it cycles through the tests in the chart above, then boots Unix. If LED 7 (00000001) lights up while the tests are being performed, it indicates that the test failed. If LED 6 (00000010) lights up while the tests are being performed, it indicates that an unexpected error (bus error, address error, unexpected interrupt, etc.) occurred during the test. When all tests are finished, LED 5 (00000100) starts blinking to indicate that the ROM monitor is running and/or Unix is booting.